Pluspunten
- Design verification engineers have a chance to go into designing ICs (but only when the company needs designers and after 1.5~2 years of stay in verification). - The company has lax rules about leaves
Minpunten
- Bond period is long (2 years for design verification engineers until recently probably increased to 3 years now) - Work of design verification engineers is routine, so there isn't much to learn. This may not be suitable for the "growth/experience" inclined, although there is a chance to go into design you'll only be eligible after 1.5~2 years of stay in verification. - Every training there has its corresponding bond. For example (in the writer's experience & knowledge): Training for Design Verification Engineer = 2 years bond, trip/training in Japan (training for work) for 2 weeks = 6 months bond, 1 month = 1 year bond. Training for development (design) has also its own bond. We say "training in Japan" but it is really more of "work in Japan". Bond overlaps with the current one. In the writer's opinion only (may not be true to other employees), the bond does not seem fair for the training received. Only good training should incur a long bond period. - The company is strict about lates; 1 min late is late; 4 lates in 1 month = memo; 5 lates in one month = 1 day suspension. etc - Hard to know the criteria for being promoted (for verification) - evaluation seems to be based on length of stay, attendance, attitude for work, and lastly work output - Employees there would find some of the company's policies counter-intuitive/counter-productive/contradictory (for example: regular work hours is 0800~1730, flexi time could be 0700~1630, or 0730~1700).