Interview was for design engineer..good interview..covered alot of basic questions and project description. interview was almost for an hour. The company expected theideal candidate will be familiar with backend verification tools and will have a good understanding of DRC/LVS/ERC/ANT, extraction of parasitic devices, and integration of digital and analog blocks. Device physics knowledge is a strong plus. The candidate must be able to handle the complexities associated with best layout for lowest cost and maximize silicon area usage.